Searched refs:mmCP_HQD_PQ_WPTR_POLL_ADDR_HI (Results 1 - 16 of 16) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10_3.c255 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v10.c269 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
H A Damdgpu_amdkfd_gfx_v9.c284 WREG32_RLC(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
H A Dmes_v10_1.c783 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
H A Dgfx_v9_0.c3445 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
H A Dgfx_v10_0.c6687 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h1510 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1520 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1530 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1540 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h581 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
H A Dgfx_7_2_d.h594 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
H A Dgfx_8_0_d.h644 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
H A Dgfx_8_1_d.h644 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h3031 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253 macro
H A Dgc_9_1_offset.h3075 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253 macro
H A Dgc_9_0_offset.h2847 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253 macro
H A Dgc_10_3_0_offset.h4964 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7 macro
[all...]
H A Dgc_10_1_0_offset.h5329 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1fb7 macro
[all...]

Completed in 872 milliseconds