Searched refs:mmCM4_CM_BLNDGAM_RAMB_END_CNTL1_G (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_0_offset.h15260 #define mmCM4_CM_BLNDGAM_RAMB_END_CNTL1_G macro
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H A Ddcn_3_0_0_offset.h7077 #define mmCM4_CM_BLNDGAM_RAMB_END_CNTL1_G 0x1365 macro
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H A Ddcn_3_0_2_offset.h7030 #define mmCM4_CM_BLNDGAM_RAMB_END_CNTL1_G 0x1365 macro
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