Searched refs:mmCC_RB_BACKEND_DISABLE (Results 1 - 18 of 18) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dvi.c738 {mmCC_RB_BACKEND_DISABLE, true},
755 case mmCC_RB_BACKEND_DISABLE:
H A Damdgpu_cik.c1114 {mmCC_RB_BACKEND_DISABLE, true},
1132 case mmCC_RB_BACKEND_DISABLE:
H A Dgfx_v6_0.c1316 data = RREG32(mmCC_RB_BACKEND_DISABLE) |
1492 RREG32(mmCC_RB_BACKEND_DISABLE);
H A Damdgpu_si.c1174 case mmCC_RB_BACKEND_DISABLE:
H A Dgfx_v7_0.c1590 data = RREG32(mmCC_RB_BACKEND_DISABLE);
1794 RREG32(mmCC_RB_BACKEND_DISABLE);
H A Dgfx_v8_0.c3431 data = RREG32(mmCC_RB_BACKEND_DISABLE) |
3636 RREG32(mmCC_RB_BACKEND_DISABLE);
H A Dgfx_v9_0.c2246 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);
H A Dgfx_v10_0.c4722 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h292 #define mmCC_RB_BACKEND_DISABLE 0x263D macro
H A Dgfx_7_0_d.h685 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_7_2_d.h698 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_8_0_d.h770 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_8_1_d.h770 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h871 #define mmCC_RB_BACKEND_DISABLE 0x063d macro
H A Dgc_9_1_offset.h905 #define mmCC_RB_BACKEND_DISABLE 0x063d macro
H A Dgc_9_0_offset.h935 #define mmCC_RB_BACKEND_DISABLE 0x063d macro
H A Dgc_10_3_0_offset.h2910 #define mmCC_RB_BACKEND_DISABLE 0x13dd macro
[all...]
H A Dgc_10_1_0_offset.h2847 #define mmCC_RB_BACKEND_DISABLE 0x13dd macro
[all...]

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