Searched refs:mmAFMT5_AFMT_MEM_PWR (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_0_offset.h12259 #define mmAFMT5_AFMT_MEM_PWR macro
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H A Ddcn_3_0_2_offset.h11123 #define mmAFMT5_AFMT_MEM_PWR macro
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