Searched refs:ixUVD_CGC_MEM_CTRL (Results 1 - 12 of 12) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_d.h27 #define ixUVD_CGC_MEM_CTRL 0x00C0 macro
H A Duvd_4_2_d.h86 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_3_1_d.h88 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_5_0_d.h97 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_6_0_d.h113 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_uvd_v4_2.c610 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
612 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
619 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
621 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
H A Duvd_v5_0.c769 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
771 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
778 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
780 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
H A Damdgpu_uvd_v3_1.c603 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
605 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
612 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
614 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
H A Duvd_v6_0.c1429 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
1431 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
1438 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL);
1440 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data);
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_offset.h1509 #define ixUVD_CGC_MEM_CTRL 0x0000 macro
H A Dvcn_4_0_0_offset.h1562 #define ixUVD_CGC_MEM_CTRL 0x0000 macro
H A Dvcn_4_0_3_offset.h2284 #define ixUVD_CGC_MEM_CTRL 0x0000 macro

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