Searched refs:ixDIDT_TD_EDC_STALL_PATTERN_5_6 (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c408 { ixDIDT_TD_EDC_STALL_PATTERN_5_6, 0xFFFFFFFF, 0, 0x00000000 },
437 { ixDIDT_TD_EDC_STALL_PATTERN_5_6, 0xFFFFFFFF, 0, 0x00000000 },
H A Dsmu7_hwmgr.c127 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 macro
153 ixDIDT_TD_EDC_STALL_PATTERN_5_6,
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h7459 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 macro
H A Dgc_9_1_offset.h7418 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 macro
H A Dgc_9_0_offset.h7211 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 macro
H A Dgc_9_4_2_offset.h108 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 macro
H A Dgc_10_3_0_offset.h13558 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 macro
[all...]
H A Dgc_10_1_0_offset.h11312 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 macro
[all...]

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