Searched refs:ixDIDT_TD_EDC_STALL_DELAY_2 (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c455 { ixDIDT_TD_EDC_STALL_DELAY_2, 0xFFFFFFFF, 0, 0x00000000 },
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h7462 #define ixDIDT_TD_EDC_STALL_DELAY_2 0x005b macro
H A Dgc_9_1_offset.h7422 #define ixDIDT_TD_EDC_STALL_DELAY_2 0x005b macro
H A Dgc_9_0_offset.h7215 #define ixDIDT_TD_EDC_STALL_DELAY_2 0x005b macro
H A Dgc_9_4_2_offset.h112 #define ixDIDT_TD_EDC_STALL_DELAY_2 0x005b macro
H A Dgc_10_3_0_offset.h13563 #define ixDIDT_TD_EDC_STALL_DELAY_2 macro
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H A Dgc_10_1_0_offset.h11317 #define ixDIDT_TD_EDC_STALL_DELAY_2 macro
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