Searched refs:ixCG_SPLL_STATUS (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dci_baco.c65 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
70 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
H A Dfiji_baco.c63 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
68 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
H A Dtonga_baco.c63 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
68 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_STATUS },
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_1_d.h52 #define ixCG_SPLL_STATUS 0xC050015C macro
H A Dsmu_7_1_3_d.h55 #define ixCG_SPLL_STATUS 0xC050015C macro
H A Dsmu_7_1_2_d.h52 #define ixCG_SPLL_STATUS 0xC050015C macro

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