Searched refs:engineClock (Results 1 - 14 of 14) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_processpptables.c208 hwmgr->platform_descriptor.overdriveLimit.engineClock = VEGA12_ENGINECLOCK_HARDMAX;
210 hwmgr->platform_descriptor.overdriveLimit.engineClock =
228 if (hwmgr->platform_descriptor.overdriveLimit.engineClock > 0
H A Dsmu8_hwmgr.c417 data->boot_power_level.engineClock =
1355 return smu8_ps->levels[0].engineClock;
1357 return smu8_ps->levels[smu8_ps->level-1].engineClock;
1391 smu8_ps->levels[index].engineClock = table->entries[clock_info_index].clk;
1612 level->coreClock = ps->levels[level_index].engineClock;
1616 if (ps->levels[i].engineClock > data->dce_slow_sclk_threshold) {
1617 level->coreClock = ps->levels[i].engineClock;
1640 clock_info->min_eng_clk = ps->levels[0].engineClock / (1 << (ps->levels[0].ssDividerIndex));
1641 clock_info->max_eng_clk = ps->levels[ps->level - 1].engineClock / (1 << (ps->levels[ps->level - 1].ssDividerIndex));
H A Dsmu8_hwmgr.h100 uint32_t engineClock; member in struct:smu8_power_level
H A Dvega10_hwmgr.c911 hwmgr->platform_descriptor.clockStep.engineClock = 500;
1354 if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0)
1355 hwmgr->platform_descriptor.overdriveLimit.engineClock =
1612 hwmgr->platform_descriptor.overdriveLimit.engineClock;
3306 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock;
3337 minimum_clocks.engineClock = stable_pstate_sclk;
3359 if (sclk < minimum_clocks.engineClock)
3360 sclk = (minimum_clocks.engineClock > max_limits->sclk) ?
3361 max_limits->sclk : minimum_clocks.engineClock;
4776 hwmgr->platform_descriptor.overdriveLimit.engineClock/10
[all...]
H A Dprocesspptables.c1117 hwmgr->platform_descriptor.overdriveLimit.engineClock =
1155 hwmgr->platform_descriptor.overdriveLimit.engineClock = le32_to_cpu(header->ulMaxEngineClock);
1175 hwmgr->platform_descriptor.overdriveLimit.engineClock = 0;
H A Dsmu7_hwmgr.c911 if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0)
912 hwmgr->platform_descriptor.overdriveLimit.engineClock = dep_sclk_table->entries[i-1].clk;
3015 hwmgr->platform_descriptor.clockStep.engineClock = 500;
3355 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock;
3378 minimum_clocks.engineClock = stable_pstate_sclk;
3410 if (sclk < minimum_clocks.engineClock)
3411 sclk = (minimum_clocks.engineClock > max_limits->sclk) ?
3412 max_limits->sclk : minimum_clocks.engineClock;
5041 hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
5463 hwmgr->platform_descriptor.overdriveLimit.engineClock < cl
[all...]
H A Dvega10_processpptables.c326 hwmgr->platform_descriptor.overdriveLimit.engineClock =
329 hwmgr->platform_descriptor.overdriveLimit.engineClock =
H A Dsmu10_hwmgr.c584 hwmgr->platform_descriptor.clockStep.engineClock = 500;
H A Dprocess_pptables_v1_0.c889 hwmgr->platform_descriptor.overdriveLimit.engineClock =
H A Dvega12_hwmgr.c427 hwmgr->platform_descriptor.clockStep.engineClock = 500;
H A Dvega20_hwmgr.c469 hwmgr->platform_descriptor.clockStep.engineClock = 500;
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dhardwaremanager.h326 uint32_t engineClock; member in struct:PP_Clocks
/openbsd-current/sys/dev/pci/drm/amd/display/dc/
H A Ddc_types.h753 unsigned int engineClock; member in struct:AsicStateEx
/openbsd-current/sys/dev/pci/drm/amd/display/dc/core/
H A Damdgpu_dc.c4654 info->engineClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dcfclk_khz;

Completed in 559 milliseconds