Searched refs:cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h633 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 0x0414 macro
H A Dnbio_7_4_offset.h867 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 0x0514 macro
H A Dnbio_7_0_offset.h1105 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 0x0414 macro
H A Dnbio_2_3_offset.h1587 #define cfgBIF_CFG_DEV0_EPF1_0_PCIE_VENDOR_SPECIFIC_HDR_GPUIOV_RESET_CONTROL 0x0514 macro
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