Searched refs:cfgBIF_CFG_DEV0_EPF1_0_LANE_3_EQUALIZATION_CNTL_16GT (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h801 #define cfgBIF_CFG_DEV0_EPF1_0_LANE_3_EQUALIZATION_CNTL_16GT 0x0433 macro
H A Dnbio_2_3_offset.h1521 #define cfgBIF_CFG_DEV0_EPF1_0_LANE_3_EQUALIZATION_CNTL_16GT 0x0433 macro
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