Searched refs:cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_15_EQUALIZATION_CNTL (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_offset.h10753 #define cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_15_EQUALIZATION_CNTL macro
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H A Dnbio_4_3_0_offset.h15504 #define cfgBIF_CFG_DEV0_EPF0_1_PCIE_LANE_15_EQUALIZATION_CNTL macro
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