Searched refs:WM_SOCCLK (Results 1 - 25 of 29) sorted by relevance

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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_smu11_driver_if.h39 WM_SOCCLK = 0, enumerator in enum:__anon242
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dsmu10_driver_if.h64 WM_SOCCLK = 0, enumerator in enum:__anon649
H A Dsmu9_driver_if.h342 WM_SOCCLK = 0, enumerator in enum:__anon488
H A Dsmu11_driver_if.h693 WM_SOCCLK = 0, enumerator in enum:__anon207
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h56 WM_SOCCLK = 0, enumerator in enum:__anon263
H A Ddcn315_clk_mgr.c429 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
430 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0;
431 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
432 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0;
433 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_5.h66 WM_SOCCLK = 0, enumerator in enum:__anon623
H A Dsmu12_driver_if.h66 WM_SOCCLK = 0, enumerator in enum:__anon891
H A Dsmu13_driver_if_v13_0_4.h66 WM_SOCCLK = 0, enumerator in enum:__anon612
H A Dsmu11_driver_if_vangogh.h65 WM_SOCCLK = 0, enumerator in enum:__anon499
H A Dsmu13_driver_if_yellow_carp.h65 WM_SOCCLK = 0, enumerator in enum:__anon716
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.h70 WM_SOCCLK = 0, enumerator in enum:__anon91
H A Dvg_clk_mgr.c434 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
435 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0;
436 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
437 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0;
438 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h55 WM_SOCCLK = 0, enumerator in enum:__anon267
H A Ddcn316_clk_mgr.c391 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
392 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0;
393 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
394 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0;
395 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h67 WM_SOCCLK = 0, enumerator in enum:__anon250
H A Ddcn31_clk_mgr.c469 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
470 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0;
471 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
472 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0;
473 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c430 table->WatermarkRow[WM_SOCCLK][i].MinClock =
432 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
434 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
436 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
439 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
H A Dsmu_v13_0_4_ppt.c686 table->WatermarkRow[WM_SOCCLK][i].MinClock =
688 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
690 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
692 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
695 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
H A Dyellow_carp_ppt.c521 table->WatermarkRow[WM_SOCCLK][i].MinClock =
523 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
525 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
527 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
530 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c484 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
485 table->WatermarkRow[WM_SOCCLK][0].MinClock = 0;
486 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
487 table->WatermarkRow[WM_SOCCLK][0].MinMclk = 0;
488 table->WatermarkRow[WM_SOCCLK][0].MaxMclk = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1073 table->WatermarkRow[WM_SOCCLK][i].MinClock =
1075 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
1077 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
1079 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
1082 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
1084 table->WatermarkRow[WM_SOCCLK][i].WmType =
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1660 table->WatermarkRow[WM_SOCCLK][i].MinClock =
1662 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
1664 table->WatermarkRow[WM_SOCCLK][i].MinMclk =
1666 table->WatermarkRow[WM_SOCCLK][i].MaxMclk =
1669 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
H A Dnavi10_ppt.c2147 table->WatermarkRow[WM_SOCCLK][i].MinClock =
2149 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
2151 table->WatermarkRow[WM_SOCCLK][i].MinUclk =
2153 table->WatermarkRow[WM_SOCCLK][i].MaxUclk =
2156 table->WatermarkRow[WM_SOCCLK][i].WmSetting =
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/vega12/
H A Dsmu9_driver_if.h586 WM_SOCCLK = 0, enumerator in enum:__anon236

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