Searched refs:VMID (Results 1 - 25 of 33) sorted by relevance

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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn21/
H A Ddcn21_hubp.h91 HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh),\
H A Ddcn21_hubp.c604 VMID, flip_regs->vmid);
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.h116 HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh)
193 type VMID
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v7.c51 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
543 pr_err("trying to set page table base for wrong VMID\n");
561 return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
H A Dvid.h72 #define VMID(x) ((x) << 4) macro
H A Dgfx_v11_0.c176 PACKET3_MAP_QUEUES_VMID(0) | /* VMID */
2047 tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);
2091 tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);
2166 tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);
2247 tmp = REG_SET_FIELD(tmp, CP_GFX_RS64_DC_BASE_CNTL, VMID, 0);
2288 tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);
2370 tmp = REG_SET_FIELD(tmp, CP_GFX_RS64_DC_BASE_CNTL, VMID, 0);
2406 tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0);
2412 tmp = REG_SET_FIELD(tmp, CP_MEC_DC_BASE_CNTL, VMID, 0);
2771 tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID,
[all...]
H A Dmes_v11_0.c748 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0);
822 /* set CP_HQD_VMID.VMID = 0. */
824 data = REG_SET_FIELD(data, CP_HQD_VMID, VMID, 0);
837 /* set CP_MQD_CONTROL.VMID=0 */
839 data = REG_SET_FIELD(data, CP_MQD_CONTROL, VMID, 0);
H A Dmes_v10_1.c668 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0);
747 /* set CP_HQD_VMID.VMID = 0. */
749 data = REG_SET_FIELD(data, CP_HQD_VMID, VMID, 0);
762 /* set CP_MQD_CONTROL.VMID=0 */
764 data = REG_SET_FIELD(data, CP_MQD_CONTROL, VMID, 0);
H A Dcikd.h59 #define VMID(x) ((x) << 4) macro
H A Damdgpu_amdkfd_gfx_v8.c45 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);
578 pr_err("trying to set page table base for wrong VMID\n");
H A Dgmc_v7_0.c451 * VMID 0 is the physical GPU addresses as used by the kernel.
765 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
1043 * VMID 0 is reserved for System
1291 VMID);
H A Dgmc_v8_0.c642 * VMID 0 is the physical GPU addresses as used by the kernel.
997 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
1156 * VMID 0 is reserved for System
1466 VMID);
H A Damdgpu_amdkfd_gfx_v10.c241 * that wptr is GPU-accessible in the queue's VMID via
319 PACKET3_MAP_QUEUES_VMID(m->cp_hqd_vmid) | /* VMID */
705 pr_err("trying to set page table base for wrong VMID %u\n",
718 * Target VMID to stall/unstall.
903 VMID,
H A Damdgpu_amdkfd_gfx_v9.c116 * for ATC add 16 to VMID for mmhub, for IH different registers.
256 * that wptr is GPU-accessible in the queue's VMID via
332 PACKET3_MAP_QUEUES_VMID(m->cp_hqd_vmid) | /* VMID */
657 * Target VMID to stall/unstall.
839 VMID,
919 pr_err("trying to set page table base for wrong VMID %u\n",
944 * a particular queue. The method also returns the VMID associated with the
950 * @vmid: Output parameter updated with VMID of queue whose wave count
962 * Program GRBM with appropriate MEID, PIPEID, QUEUEID and VMID
963 * parameters to read out waves in flight. Get VMID i
[all...]
H A Dnv.c324 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid);
H A Dgmc_v6_0.c606 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
863 * VMID 0 is reserved for System
H A Dsoc21.c237 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid);
H A Dsoc15.c345 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid);
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_hubp.h224 HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh),\
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.h239 HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh),\
H A Ddcn30_hubp.c79 // Program VMID reg
82 VMID, address->vmid);
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dcik_sdma.c961 radeon_ring_write(ring, VMID(vm_id));
981 radeon_ring_write(ring, VMID(0));
H A Dnid.h61 #define VMID(x) (((x) & 0x7) << 0) macro
/openbsd-current/usr.sbin/vmd/
H A Dparse.y128 %token PATH PREFIX RDOMAIN SIZE SOCKET SWITCH UP VM VMID STAGGERED START
828 { "id", VMID },
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dsmu8_smumgr.c200 tmp = PHM_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0);

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