Searched refs:VLV_DISPLAY_BASE (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/i915/display/
H A Dintel_backlight_regs.h11 #define _VLV_BLC_PWM_CTL2_A (VLV_DISPLAY_BASE + 0x61250)
12 #define _VLV_BLC_PWM_CTL2_B (VLV_DISPLAY_BASE + 0x61350)
15 #define _VLV_BLC_PWM_CTL_A (VLV_DISPLAY_BASE + 0x61254)
16 #define _VLV_BLC_PWM_CTL_B (VLV_DISPLAY_BASE + 0x61354)
19 #define _VLV_BLC_HIST_CTL_A (VLV_DISPLAY_BASE + 0x61260)
20 #define _VLV_BLC_HIST_CTL_B (VLV_DISPLAY_BASE + 0x61360)
H A Dintel_audio_regs.h41 #define _VLV_HDMIW_HDMIEDID_A (VLV_DISPLAY_BASE + 0x62050)
42 #define _VLV_HDMIW_HDMIEDID_B (VLV_DISPLAY_BASE + 0x62150)
44 #define _VLV_AUD_CNTL_ST_A (VLV_DISPLAY_BASE + 0x620B4)
45 #define _VLV_AUD_CNTL_ST_B (VLV_DISPLAY_BASE + 0x621B4)
47 #define VLV_AUD_CNTL_ST2 _MMIO(VLV_DISPLAY_BASE + 0x620C0)
55 #define _VLV_AUD_CONFIG_A (VLV_DISPLAY_BASE + 0x62000)
56 #define _VLV_AUD_CONFIG_B (VLV_DISPLAY_BASE + 0x62100)
H A Dintel_pps_regs.h13 #define VLV_PPS_BASE (VLV_DISPLAY_BASE + PPS_BASE)
H A Dvlv_dsi_regs.h11 #define VLV_MIPI_BASE VLV_DISPLAY_BASE
41 #define _MIPIA_PORT_CTRL (VLV_DISPLAY_BASE + 0x61190)
42 #define _MIPIC_PORT_CTRL (VLV_DISPLAY_BASE + 0x61700)
90 #define _MIPIA_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61194)
91 #define _MIPIC_TEARING_CTRL (VLV_DISPLAY_BASE + 0x61704)
97 #define _MIPIA_AUTOPWG (VLV_DISPLAY_BASE + 0x611a0)
H A Dintel_display_reg_defs.h13 #define VLV_DISPLAY_BASE 0x180000 macro
H A Dintel_display_device.c380 .mmio_offset = VLV_DISPLAY_BASE,
435 .mmio_offset = VLV_DISPLAY_BASE,
H A Dintel_gmbus.c983 i915->display.gmbus.mmio_base = VLV_DISPLAY_BASE;
/openbsd-current/sys/dev/pci/drm/i915/
H A Di915_reg.h164 #define VLV_IOSF_DOORBELL_REQ _MMIO(VLV_DISPLAY_BASE + 0x2100)
186 #define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104)
187 #define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108)
192 #define DPIO_CTL _MMIO(VLV_DISPLAY_BASE + 0x2110)
999 #define CLAIM_ER _MMIO(VLV_DISPLAY_BASE + 0x2028)
1023 #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030)
1024 #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034)
1032 #define VLV_GUNIT_CLOCK_GATE _MMIO(VLV_DISPLAY_BASE + 0x2060)
1035 #define VLV_GUNIT_CLOCK_GATE2 _MMIO(VLV_DISPLAY_BASE + 0x2064)
1036 #define VLV_IIR_RW _MMIO(VLV_DISPLAY_BASE
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