Searched refs:VGA_RENDER_CONTROL (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Davivod.h59 #define VGA_RENDER_CONTROL 0x0300 macro
H A Devergreen.c2673 save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
2677 WREG32(VGA_RENDER_CONTROL, 0);
2848 WREG32(VGA_RENDER_CONTROL, save->vga_render_control);
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_si.c1271 vga_render_control = RREG32(VGA_RENDER_CONTROL);
1285 WREG32(VGA_RENDER_CONTROL,
1297 WREG32(VGA_RENDER_CONTROL, vga_render_control);
H A Dsid.h2008 #define VGA_RENDER_CONTROL 0xC0 macro
2344 #define VGA_RENDER_CONTROL 0xC0 macro
H A Dgmc_v7_0.c280 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
H A Dgmc_v9_0.c2347 WREG32_FIELD15(DCE, 0, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
H A Dgmc_v8_0.c454 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
H A Ddce_v11_0.c478 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
480 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
H A Ddce_v10_0.c456 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
458 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);
H A Ddce_v8_0.c393 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1);
395 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0);

Completed in 373 milliseconds