Searched refs:UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_sh_mask.h786 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Duvd_6_0_sh_mask.h780 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Duvd_7_0_sh_mask.h246 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h537 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_2_0_0_sh_mask.h3295 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_2_6_0_sh_mask.h3840 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_2_5_sh_mask.h2169 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_3_0_0_sh_mask.h2917 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_4_0_0_sh_mask.h2839 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
H A Dvcn_4_0_3_sh_mask.h2839 #define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0 macro
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