Searched refs:UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_sh_mask.h1802 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
H A Dvcn_2_6_0_sh_mask.h3522 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
H A Dvcn_2_5_sh_mask.h1862 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
H A Dvcn_3_0_0_sh_mask.h2581 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
H A Dvcn_4_0_0_sh_mask.h3784 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
H A Dvcn_4_0_3_sh_mask.h3819 #define UVD_SOFT_RESET2__MMSCH_VCLK_RESET_STATUS__SHIFT 0x10 macro
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