Searched refs:UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_sh_mask.h42597 #define UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK macro
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H A Ddcn_3_1_2_sh_mask.h44494 #define UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK macro
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H A Ddcn_3_0_1_sh_mask.h35778 #define UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3522 #define UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK 0x00010000L macro
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H A Ddpcs_4_2_2_sh_mask.h3643 #define UNIPHYA_LINK_CNTL__UNIPHY_LINK_PWRSEQ_SEL_MASK 0x00010000L macro
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