Searched refs:UMC_BASE__INST1_SEG5 (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dnavi10_ip_offset.h783 #define UMC_BASE__INST1_SEG5 0 macro
H A Dvega20_ip_offset.h852 #define UMC_BASE__INST1_SEG5 0 macro
H A Dbeige_goby_ip_offset.h1188 #define UMC_BASE__INST1_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h963 #define UMC_BASE__INST1_SEG5 0 macro
H A Dyellow_carp_offset.h1279 #define UMC_BASE__INST1_SEG5 0 macro
H A Daldebaran_ip_offset.h1407 #define UMC_BASE__INST1_SEG5 0 macro
H A Dvangogh_ip_offset.h1360 #define UMC_BASE__INST1_SEG5 0 macro
H A Darct_ip_offset.h1437 #define UMC_BASE__INST1_SEG5 0 macro

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