Searched refs:TIME_STAMP_INT_ENABLE (Results 1 - 15 of 15) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Dcik.c7051 cp_m1p0 = RREG32(CP_ME1_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7052 cp_m1p1 = RREG32(CP_ME1_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7053 cp_m1p2 = RREG32(CP_ME1_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7054 cp_m1p3 = RREG32(CP_ME1_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7055 cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7056 cp_m2p1 = RREG32(CP_ME2_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7057 cp_m2p2 = RREG32(CP_ME2_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7058 cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7063 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
7071 cp_m1p0 |= TIME_STAMP_INT_ENABLE;
[all...]
H A Dcikd.h1337 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
1369 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Dnid.h497 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Dsid.h1282 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Devergreen.c4527 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
4531 cp_int_cntl1 |= TIME_STAMP_INT_ENABLE;
4535 cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;
4541 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
H A Dsi.c6082 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
6086 cp_int_cntl1 |= TIME_STAMP_INT_ENABLE;
6090 cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;
H A Devergreend.h1250 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Dr600d.h718 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Dr600.c3822 cp_int_cntl |= TIME_STAMP_INT_ENABLE;
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfx_v11_0.c5742 TIME_STAMP_INT_ENABLE, 0);
5750 TIME_STAMP_INT_ENABLE, 1);
5799 TIME_STAMP_INT_ENABLE, 0);
5807 TIME_STAMP_INT_ENABLE, 1);
H A Dgfx_v9_4_3.c2743 TIME_STAMP_INT_ENABLE, 0);
2749 TIME_STAMP_INT_ENABLE, 1);
H A Dgfx_v9_0.c5718 TIME_STAMP_INT_ENABLE,
5765 TIME_STAMP_INT_ENABLE, 0);
5771 TIME_STAMP_INT_ENABLE, 1);
H A Dsid.h1310 # define TIME_STAMP_INT_ENABLE (1 << 26) macro
H A Dgfx_v10_0.c8789 TIME_STAMP_INT_ENABLE, 0);
8795 TIME_STAMP_INT_ENABLE, 1);
8842 TIME_STAMP_INT_ENABLE, 0);
8848 TIME_STAMP_INT_ENABLE, 1);
H A Dgfx_v8_0.c6413 WREG32_FIELD(CP_INT_CNTL_RING0, TIME_STAMP_INT_ENABLE,

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