Searched refs:THM_TMON2_CSR_WR__CSR_WRITE__SHIFT (Results 1 - 1 of 1) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/smu/ | ||
| H A D | smu_7_1_3_sh_mask.h | 3918 #define THM_TMON2_CSR_WR__CSR_WRITE__SHIFT 0x0 macro |
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