Searched refs:SQ_SRC_M_5_INT (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h2916 #define SQ_SRC_M_5_INT 0xc5 macro
H A Dgfx_8_0_enum.h3249 #define SQ_SRC_M_5_INT 0xc5 macro
H A Dgfx_8_1_enum.h3267 #define SQ_SRC_M_5_INT 0xc5 macro
/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h18882 #define SQ_SRC_M_5_INT 0x000000c5 macro

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