Searched refs:SMUIO_BASE__INST0_SEG1 (Results 1 - 14 of 14) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dcyan_skillfish_ip_offset.h570 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dnavi10_ip_offset.h688 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dvega20_ip_offset.h757 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dbeige_goby_ip_offset.h1079 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Ddimgrey_cavefish_ip_offset.h854 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Drenoir_ip_offset.h1160 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dnavi12_ip_offset.h910 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dnavi14_ip_offset.h910 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dvega10_ip_offset.h1146 #define SMUIO_BASE__INST0_SEG1 0 macro
H A Dsienna_cichlid_ip_offset.h959 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dyellow_carp_offset.h1170 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Daldebaran_ip_offset.h1298 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Dvangogh_ip_offset.h1237 #define SMUIO_BASE__INST0_SEG1 0x00016A00 macro
H A Darct_ip_offset.h1314 #define SMUIO_BASE__INST0_SEG1 0x00016800 macro

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