Searched refs:SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Diceland_sdma_pkt_open.h1612 #define SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift 0 macro
1613 #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift)
H A Dtonga_sdma_pkt_open.h1612 #define SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift 0 macro
1613 #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift)
H A Dvega10_sdma_pkt_open.h2045 #define SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift 0 macro
2046 #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift)
H A Dnavi10_sdma_pkt_open.h3321 #define SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift 0 macro
3322 #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift)
H A Dsdma_v6_0_0_pkt_open.h3852 #define SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift 0 macro
3853 #define SDMA_PKT_WRITE_INCR_INCR_DW0_INCR_DW0(x) (((x) & SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_mask) << SDMA_PKT_WRITE_INCR_INCR_DW0_incr_dw0_shift)

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