Searched refs:SDMA_PKT_POLL_REGMEM_DW5_interval_mask (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Diceland_sdma_pkt_open.h2017 #define SDMA_PKT_POLL_REGMEM_DW5_interval_mask 0x0000FFFF macro
2019 #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift)
H A Dtonga_sdma_pkt_open.h2017 #define SDMA_PKT_POLL_REGMEM_DW5_interval_mask 0x0000FFFF macro
2019 #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift)
H A Dvega10_sdma_pkt_open.h2509 #define SDMA_PKT_POLL_REGMEM_DW5_interval_mask 0x0000FFFF macro
2511 #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift)
H A Dnavi10_sdma_pkt_open.h3833 #define SDMA_PKT_POLL_REGMEM_DW5_interval_mask 0x0000FFFF macro
3835 #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift)
H A Dsdma_v6_0_0_pkt_open.h4537 #define SDMA_PKT_POLL_REGMEM_DW5_interval_mask 0x0000FFFF macro
4539 #define SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(x) (((x) & SDMA_PKT_POLL_REGMEM_DW5_interval_mask) << SDMA_PKT_POLL_REGMEM_DW5_interval_shift)

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