Searched refs:SDMA3_RLC5_RB_BASE_HI__ADDR__SHIFT (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma3/
H A Dsdma3_4_2_2_sh_mask.h2412 #define SDMA3_RLC5_RB_BASE_HI__ADDR__SHIFT 0x0 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h10588 #define SDMA3_RLC5_RB_BASE_HI__ADDR__SHIFT macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h43903 #define SDMA3_RLC5_RB_BASE_HI__ADDR__SHIFT macro
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