Searched refs:SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_0_sh_mask.h245 #define SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT 0x1e macro
H A Dsdma0_4_1_sh_mask.h242 #define SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT 0x1e macro
H A Dsdma0_4_2_2_sh_mask.h245 #define SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT 0x1e macro
H A Dsdma0_4_2_sh_mask.h245 #define SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT 0x1e macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h37043 #define SDMA0_PUB_REG_TYPE1__SDMA0_UTCL1_RD_STATUS__SHIFT macro
[all...]

Completed in 672 milliseconds