Searched refs:RLC_LB_CNTL (Results 1 - 7 of 7) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | gfx_v9_0.c | 1560 /* set RLC_LB_CNTL = 0x8000_0095, 31 bit is reserved,
1561 * but used for RLC_LB_CNTL configuration */
1563 data |= REG_SET_FIELD(data, RLC_LB_CNTL, CU_MASK_USED_OFF_HYST, 0x09);
1564 data |= REG_SET_FIELD(data, RLC_LB_CNTL, RESERVED, 0x80000);
1609 /* set RLC_LB_CNTL = 0x8000_0095, 31 bit is reserved,
1610 * but used for RLC_LB_CNTL configuration */
1612 data |= REG_SET_FIELD(data, RLC_LB_CNTL, CU_MASK_USED_OFF_HYST, 0x09);
1613 data |= REG_SET_FIELD(data, RLC_LB_CNTL, RESERVED, 0x80000);
1622 WREG32_FIELD15(GC, 0, RLC_LB_CNTL, LOAD_BALANCE_ENABLE, enable ? 1 : 0);
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| H A D | sid.h | 1332 #define RLC_LB_CNTL 0x30C3 macro
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| H A D | gfx_v6_0.c | 2391 WREG32_FIELD(RLC_LB_CNTL, LOAD_BALANCE_ENABLE, enable ? 1 : 0);
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| /openbsd-current/sys/dev/pci/drm/radeon/ |
| H A D | cikd.h | 1403 #define RLC_LB_CNTL 0xC364 macro
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| H A D | sid.h | 1304 #define RLC_LB_CNTL 0xC30C macro
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| H A D | si.c | 5851 tmp = RREG32(RLC_LB_CNTL);
5856 WREG32(RLC_LB_CNTL, tmp);
5881 WREG32(RLC_LB_CNTL, 0);
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| H A D | cik.c | 5773 tmp = RREG32(RLC_LB_CNTL);
5778 WREG32(RLC_LB_CNTL, tmp);
5934 WREG32(RLC_LB_CNTL, 0x80000004);
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