Searched refs:PCIE0_BASE__INST1_SEG4 (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dbeige_goby_ip_offset.h991 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Drenoir_ip_offset.h1085 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Dnavi12_ip_offset.h835 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Dnavi14_ip_offset.h835 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Dsienna_cichlid_ip_offset.h842 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Daldebaran_ip_offset.h1161 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Dvangogh_ip_offset.h1191 #define PCIE0_BASE__INST1_SEG4 0 macro
H A Darct_ip_offset.h873 #define PCIE0_BASE__INST1_SEG4 0 macro

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