Searched refs:PACKET3_SET_SH_REG (Results 1 - 12 of 12) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsi_enums.h267 #define PACKET3_SET_SH_REG 0x76 macro
H A Dvid.h346 #define PACKET3_SET_SH_REG 0x76 macro
H A Dnvd.h330 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsoc15d.h294 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h464 #define PACKET3_SET_SH_REG 0x76 macro
H A Dgfx_v9_4_2.c381 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
389 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
396 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 3);
H A Dgfx_v8_0.c1543 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1549 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
1569 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1575 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
1595 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1601 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
H A Dgfx_v9_0.c4412 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4419 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
4440 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4447 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
4468 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4475 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
H A Dsid.h1853 #define PACKET3_SET_SH_REG 0x76 macro
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dcikd.h1932 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsid.h1790 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsi.c4577 case PACKET3_SET_SH_REG:
4680 case PACKET3_SET_SH_REG:

Completed in 500 milliseconds