Searched refs:PACKET3_SET_CONTEXT_REG (Results 1 - 21 of 21) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | si_enums.h | 262 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | vid.h | 342 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | nvd.h | 321 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | soc15d.h | 290 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | cikd.h | 460 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | gfx_v6_0.c | 2024 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
2038 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
2859 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
2869 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));
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| H A D | gfx_v7_0.c | 2489 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
2497 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
2508 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
3937 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
3947 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
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| H A D | gfx_v8_0.c | 1233 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
1244 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
4172 PACKET3(PACKET3_SET_CONTEXT_REG,
4182 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
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| H A D | gfx_v11_0.c | 637 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
650 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));
3160 PACKET3(PACKET3_SET_CONTEXT_REG,
3172 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
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| H A D | sid.h | 1848 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | gfx_v9_0.c | 1460 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
3061 PACKET3(PACKET3_SET_CONTEXT_REG,
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| H A D | gfx_v10_0.c | 4094 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
4107 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));
5979 PACKET3(PACKET3_SET_CONTEXT_REG,
5991 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));
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| /openbsd-current/sys/dev/pci/drm/radeon/ |
| H A D | nid.h | 1272 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | si.c | 3604 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
4575 case PACKET3_SET_CONTEXT_REG:
4678 case PACKET3_SET_CONTEXT_REG:
5736 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
5746 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));
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| H A D | cikd.h | 1928 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | sid.h | 1785 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | evergreen_cs.c | 2316 case PACKET3_SET_CONTEXT_REG:
2322 DRM_ERROR("bad PACKET3_SET_CONTEXT_REG\n");
3395 case PACKET3_SET_CONTEXT_REG:
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| H A D | evergreend.h | 1668 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | r600d.h | 1689 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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| H A D | r600_cs.c | 1924 case PACKET3_SET_CONTEXT_REG:
1930 DRM_ERROR("bad PACKET3_SET_CONTEXT_REG\n");
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| H A D | cik.c | 4013 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
6721 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
6731 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
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