/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | si_enums.h | 259 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | vid.h | 339 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | nvd.h | 318 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | soc15d.h | 287 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | cikd.h | 457 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | gfx_v6_0.c | 1780 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 1810 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 1887 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
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H A D | sid.h | 1845 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | gfx_v9_4_3.c | 2526 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | gfx_v7_0.c | 2245 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | gfx_v8_0.c | 6136 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | gfx_v9_0.c | 5271 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | gfx_v11_0.c | 5349 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | gfx_v10_0.c | 8354 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | r600.c | 2842 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 2902 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 2906 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 2991 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 3011 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 3373 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 3415 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
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H A D | nid.h | 1269 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | cikd.h | 1925 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | sid.h | 1782 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | si.c | 3376 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 3415 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 3442 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 4620 case PACKET3_SET_CONFIG_REG: 4626 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
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H A D | evergreen_cs.c | 2299 case PACKET3_SET_CONFIG_REG: 2305 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n"); 3420 case PACKET3_SET_CONFIG_REG: 3426 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
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H A D | evergreend.h | 1665 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | r600d.h | 1686 #define PACKET3_SET_CONFIG_REG 0x68 macro
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H A D | r600_cs.c | 1908 case PACKET3_SET_CONFIG_REG: 1914 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
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H A D | ni.c | 1425 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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H A D | evergreen.c | 2943 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
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