Searched refs:PACKET3_SET_CONFIG_REG (Results 1 - 24 of 24) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsi_enums.h259 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dvid.h339 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dnvd.h318 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dsoc15d.h287 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dcikd.h457 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dgfx_v6_0.c1780 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
1810 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
1887 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
H A Dsid.h1845 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dgfx_v9_4_3.c2526 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Dgfx_v7_0.c2245 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Dgfx_v8_0.c6136 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Dgfx_v9_0.c5271 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Dgfx_v11_0.c5349 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Dgfx_v10_0.c8354 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dr600.c2842 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2902 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2906 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2991 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3011 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3373 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3415 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
H A Dnid.h1269 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dcikd.h1925 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dsid.h1782 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dsi.c3376 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3415 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3442 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
4620 case PACKET3_SET_CONFIG_REG:
4626 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
H A Devergreen_cs.c2299 case PACKET3_SET_CONFIG_REG:
2305 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
3420 case PACKET3_SET_CONFIG_REG:
3426 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
H A Devergreend.h1665 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dr600d.h1686 #define PACKET3_SET_CONFIG_REG 0x68 macro
H A Dr600_cs.c1908 case PACKET3_SET_CONFIG_REG:
1914 DRM_ERROR("bad PACKET3_SET_CONFIG_REG\n");
H A Dni.c1425 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
H A Devergreen.c2943 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

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