Searched refs:PACKET3_EVENT_WRITE (Results 1 - 19 of 19) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsi_enums.h249 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dvid.h226 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dnvd.h154 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dsoc15d.h169 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dcikd.h344 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dgfx_v8_0.c1563 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
1589 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
1615 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
6076 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
6080 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
H A Dgfx_v9_0.c4434 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
4462 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
4490 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);
H A Dsid.h1811 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dgfx_v7_0.c2095 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
2099 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
H A Dgfx_v6_0.c1799 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dnid.h1238 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dcikd.h1812 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dsid.h1748 #define PACKET3_EVENT_WRITE 0x46 macro
H A Devergreen_cs.c2234 case PACKET3_EVENT_WRITE:
3392 case PACKET3_EVENT_WRITE:
H A Devergreend.h1653 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dr600d.h1663 #define PACKET3_EVENT_WRITE 0x46 macro
H A Dr600_cs.c1865 case PACKET3_EVENT_WRITE:
H A Dsi.c4572 case PACKET3_EVENT_WRITE:
4675 case PACKET3_EVENT_WRITE:
H A Dr600.c2899 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

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