Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 - 21 of 21) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsi_enums.h192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dvid.h131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dnvd.h76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dsoc15d.h99 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dcikd.h249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dgfx_v7_0.c2275 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
2481 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
3929 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Dgfx_v6_0.c2851 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
2940 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Dgfx_v8_0.c1225 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
4164 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
6325 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Dgfx_v9_0.c1452 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
3053 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
5606 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Dgfx_v11_0.c629 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
3152 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
5483 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Dsid.h1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dgfx_v10_0.c4086 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
5971 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
8504 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dnid.h1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dcikd.h1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dsid.h1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Devergreen_cs.c1826 case PACKET3_CONTEXT_CONTROL:
3376 case PACKET3_CONTEXT_CONTROL:
H A Dsi.c4556 case PACKET3_CONTEXT_CONTROL:
4669 case PACKET3_CONTEXT_CONTROL:
5728 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
H A Devergreend.h1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dr600d.h1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
H A Dr600_cs.c1688 case PACKET3_CONTEXT_CONTROL:
H A Dcik.c3999 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));

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