| /openbsd-current/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 69 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI);
145 bool AVRExpandPseudo::expandArith(unsigned OpLo, unsigned OpHi, Block &MBB,
158 buildMI(MBB, MBBI, OpLo)
345 unsigned OpLo = AVR::SBCIRdK; local
350 buildMI(MBB, MBBI, OpLo)
407 unsigned OpLo = AVR::COMRd; local
412 buildMI(MBB, MBBI, OpLo)
479 unsigned OpLo = AVR::CPRdRr; local
485 buildMI(MBB, MBBI, OpLo)
512 unsigned OpLo local
544 unsigned OpLo = AVR::LDIRdK; local
595 unsigned OpLo = AVR::LDSRdK; local
687 unsigned OpLo = AVR::LDRdPtrPi; local
720 unsigned OpLo = AVR::LDRdPtrPd; local
819 unsigned OpLo = IsExt ? AVR::ELPMRdZPi : AVR::LPMRdZPi; local
974 unsigned OpLo = AVR::STSKRr; local
1064 unsigned OpLo = AVR::STPtrPiRr; local
1099 unsigned OpLo = AVR::STPtrPdRr; local
1165 unsigned OpLo = AVR::STDPtrQRr; local
1233 unsigned OpLo = AVR::INRdA; local
1265 unsigned OpLo = AVR::OUTARr; local
1296 unsigned OpLo = AVR::PUSHRr; local
1320 unsigned OpLo = AVR::POPRd; local
1406 unsigned OpLo = AVR::ADDRdRr; // ADD Rd, Rd <==> LSL Rd local
1607 unsigned OpLo = AVR::RORRd; local
1817 unsigned OpLo = AVR::RORRd; local
2344 unsigned OpLo = AVR::INRdA; local
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1962 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); local
1965 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi);
|
| /openbsd-current/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1575 SDValue OpLo = Op; local
1583 GetSplitVector(Op, OpLo, OpHi);
1585 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i);
1588 OpsLo[i] = OpLo;
|
| /openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4622 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, local
4627 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
4648 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, local
4653 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
4678 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, local
4683 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
|
| /openbsd-current/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 22219 SDValue OpLo = DAG.getNode(ExtendInVecOpc, dl, HalfVT, In);
22225 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpLo);
22233 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi);
22596 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In,
22601 return DAG.getVectorShuffle(VT, DL, DAG.getBitcast(MVT::v4i32, OpLo),
22624 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In,
22632 OpLo = DAG.getBitcast(MVT::v8i16, OpLo);
22635 OpLo
[all...] |