Searched refs:OTG4_OTG_STEREO_CONTROL__OTG_FIELD_NUM_SEL_MASK (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h31049 #define OTG4_OTG_STEREO_CONTROL__OTG_FIELD_NUM_SEL_MASK macro
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H A Ddcn_3_0_0_sh_mask.h33446 #define OTG4_OTG_STEREO_CONTROL__OTG_FIELD_NUM_SEL_MASK macro
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H A Ddcn_3_0_2_sh_mask.h29919 #define OTG4_OTG_STEREO_CONTROL__OTG_FIELD_NUM_SEL_MASK macro
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