Searched refs:MaxClock (Results 1 - 25 of 31) sorted by relevance

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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_smu11_driver_if.h26 uint16_t MaxClock; // This is either DCEFCLK or SOCCLK (in MHz) member in struct:__anon241
H A Ddcn30_clk_mgr.c342 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_dcfclk;
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dsmu10_driver_if.h52 uint16_t MaxClock; /* This is either DCFCLK or SOCCLK (in MHz) */ member in struct:__anon648
H A Dsmu9_driver_if.h331 uint16_t MaxClock; // This is either DCEFCLK or SOCCLK (in MHz) member in struct:__anon487
H A Dsmu11_driver_if.h682 uint16_t MaxClock; member in struct:__anon206
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h43 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon262
H A Ddcn315_clk_mgr.c396 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
412 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
415 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
426 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
431 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_5.h53 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon622
H A Dsmu12_driver_if.h52 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon890
H A Dsmu13_driver_if_v13_0_4.h52 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon611
H A Dsmu11_driver_if_vangogh.h51 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon498
H A Dsmu13_driver_if_yellow_carp.h51 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon715
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.h57 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon90
H A Dvg_clk_mgr.c401 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
417 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
420 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
431 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
436 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h42 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon266
H A Ddcn316_clk_mgr.c358 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
374 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
377 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
388 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
393 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h53 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member in struct:__anon249
H A Ddcn31_clk_mgr.c436 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
452 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
455 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
466 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
471 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c451 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
467 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF;
470 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
481 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF;
486 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF;
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.h37 uint16_t MaxClock; member in struct:watermark_row_generic_t
H A Dsmu_helper.c732 table->WatermarkRow[1][i].MaxClock =
753 table->WatermarkRow[0][i].MaxClock =
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c418 table->WatermarkRow[WM_DCFCLK][i].MaxClock =
432 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
H A Dsmu_v13_0_4_ppt.c674 table->WatermarkRow[WM_DCFCLK][i].MaxClock =
688 table->WatermarkRow[WM_SOCCLK][i].MaxClock =
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/vega12/
H A Dsmu9_driver_if.h575 uint16_t MaxClock; member in struct:__anon235
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1059 table->WatermarkRow[WM_DCFCLK][i].MaxClock =
1075 table->WatermarkRow[WM_SOCCLK][i].MaxClock =

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