Searched refs:MP1_BASE__INST3_SEG5 (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dnavi10_ip_offset.h545 #define MP1_BASE__INST3_SEG5 0 macro
H A Dvega20_ip_offset.h572 #define MP1_BASE__INST3_SEG5 0 macro
H A Dbeige_goby_ip_offset.h859 #define MP1_BASE__INST3_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h732 #define MP1_BASE__INST3_SEG5 0 macro
H A Dyellow_carp_offset.h901 #define MP1_BASE__INST3_SEG5 0 macro
H A Daldebaran_ip_offset.h1029 #define MP1_BASE__INST3_SEG5 0 macro
H A Dvangogh_ip_offset.h982 #define MP1_BASE__INST3_SEG5 0 macro
H A Darct_ip_offset.h720 #define MP1_BASE__INST3_SEG5 0 macro

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