Searched refs:MASTER_UPDATE_MODE_MASTER_UPDATE_MODE_BETWEEN (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h449 MASTER_UPDATE_MODE_MASTER_UPDATE_MODE_BETWEEN = 0x0, enumerator in enum:MASTER_UPDATE_MODE_MASTER_UPDATE_MODE
H A Ddce_11_2_enum.h446 MASTER_UPDATE_MODE_MASTER_UPDATE_MODE_BETWEEN = 0x0, enumerator in enum:MASTER_UPDATE_MODE_MASTER_UPDATE_MODE
/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h2624 MASTER_UPDATE_MODE_MASTER_UPDATE_MODE_BETWEEN = 0x00000000, enumerator in enum:MASTER_UPDATE_MODE_MASTER_UPDATE_MODE

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