Searched refs:LEVEL0_MPLL_POST_DIV_MASK (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Drv6xxd.h80 # define LEVEL0_MPLL_POST_DIV_MASK (0xff << 0) macro
H A Drv6xx_dpm.c383 LEVEL0_MPLL_POST_DIV(divider), ~LEVEL0_MPLL_POST_DIV_MASK);

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