Searched refs:InitReg (Results 1 - 3 of 3) sorted by relevance
| /openbsd-current/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | ModuloSchedule.cpp | 1271 // Map from <LoopReg, InitReg> to phi register for all created phis. Note that
1272 // this map is only used when InitReg is non-undef.
1274 // Map from LoopReg to phi register where the InitReg is undef.
1280 // Insert a phi that carries LoopReg from the loop body and InitReg otherwise.
1281 // If InitReg is not given it is chosen arbitrarily. It will either be undef
1283 Register phi(Register LoopReg, std::optional<Register> InitReg = {},
1468 Register KernelRewriter::phi(Register LoopReg, std::optional<Register> InitReg, argument
1471 if (InitReg) {
1472 auto I = Phis.find({LoopReg, *InitReg});
1482 // InitReg i
[all...] |
| /openbsd-current/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600MachineCFGStructurizer.cpp | 1287 Register InitReg = local
1289 insertCondBranchBefore(LandBlk, I, R600::IF_PREDICATE_SET, InitReg,
|
| H A D | SIISelLowering.cpp | 3622 unsigned InitReg, unsigned ResultReg, unsigned PhiReg,
3638 .addReg(InitReg)
3870 Register InitReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); local
3872 BuildMI(MBB, I, DL, TII->get(TargetOpcode::IMPLICIT_DEF), InitReg);
3875 auto InsPt = loadM0FromVGPR(TII, MBB, MI, InitReg, PhiReg, Offset,
3619 emitLoadM0FromVGPRLoop(const SIInstrInfo *TII, MachineRegisterInfo &MRI, MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, const DebugLoc &DL, const MachineOperand &Idx, unsigned InitReg, unsigned ResultReg, unsigned PhiReg, unsigned InitSaveExecReg, int Offset, bool UseGPRIdxMode, Register &SGPRIdxReg) argument
|
Completed in 204 milliseconds