| /openbsd-current/sys/dev/fdt/ |
| H A D | mviic.c | 47 #define ISR 0x0c macro
140 HWRITE4(sc, ISR, ISR_INIT);
183 if (((state = HREAD4(sc, ISR)) & mask) == value)
248 HWRITE4(sc, ISR, ISR_TXE);
249 if (HREAD4(sc, ISR) & ISR_NAK)
274 HWRITE4(sc, ISR, ISR_RXF);
294 HWRITE4(sc, ISR, ISR_TXE);
295 if (HREAD4(sc, ISR) & ISR_NAK)
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| /openbsd-current/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430AsmPrinter.cpp | 62 void EmitInterruptVectorSection(MachineFunction &ISR);
162 void MSP430AsmPrinter::EmitInterruptVectorSection(MachineFunction &ISR) { argument
164 const auto *F = &ISR.getFunction();
180 // Emit separate section for an interrupt vector if ISR
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| /openbsd-current/sys/arch/m88k/m88k/ |
| H A D | m88110_mmu.S | 111 stcr %r2, ISR
195 ldcr %r2, ISR
|
| H A D | eh_common.S | 1781 ldcr %r10, ISR
1955 ldcr TMP, ISR
1966 stcr %r0, ISR
2033 * DSR/ISR, fault registers, if appropriate.
2091 * DSR/ISR, fault registers, if appropriate.
|
| /openbsd-current/sys/arch/macppc/dev/ |
| H A D | kiicvar.h | 43 #define ISR 3 macro
75 /* ISR/IER */
|
| H A D | kiic.c | 111 kiic_writereg(sc, ISR, 0);
196 isr = kiic_readreg(sc, ISR);
253 kiic_writereg(sc, ISR, isr);
262 if (kiic_readreg(sc, ISR))
|
| /openbsd-current/gnu/usr.bin/binutils/gdb/ |
| H A D | ser-go32.c | 358 #define ISR(x) static void ISRNAME(x)(void) {dos_comisr(x);}
360 ISR (0) ISR (1) ISR (2) ISR (3) /* OK */
361 ISR (4) ISR (5) ISR (6) ISR (7) /* OK */
357 #define ISR macro
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| /openbsd-current/sys/arch/m88k/include/ |
| H A D | asm.h | 111 #define ISR %cr34 /* 88110 */ macro
|
| /openbsd-current/gnu/usr.bin/binutils/opcodes/ |
| H A D | i370-opc.c | 459 #define ISR I370_OPCODE_ESA390_SR
461 #define I390 IBF | IBS | ICK | ICM | IIR | IFX | IHX | IMI | IPC | IPL | IQR | IRP | ISA | ISG | ISR | ITR | I370_OPCODE_ESA390
571 { "clst", 4, {{RRE(0xb25d,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
634 { "mvst", 4, {{RRE(0xb255,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
652 { "srst", 4, {{RRE(0xb25e,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
455 #define ISR macro
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| /openbsd-current/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | i370-opc.c | 448 #define ISR I370_OPCODE_ESA390_SR
450 #define I390 IBF | IBS | ICK | ICM | IIR | IFX | IHX | IMI | IPC | IPL | IQR | IRP | ISA | ISG | ISR | ITR | I370_OPCODE_ESA390
560 { "clst", 4, {{RRE(0xb25d,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
623 { "mvst", 4, {{RRE(0xb255,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
641 { "srst", 4, {{RRE(0xb25e,0,0), 0}}, {{RRE_MASK, 0}}, ISR, {RRE_R1, RRE_R2} },
443 #define ISR macro
|
| /openbsd-current/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 7154 SDValue ISR = N->getOperand(0);
7155 if (!ISR.isMachineOpcode() ||
7156 ISR.getMachineOpcode() != TargetOpcode::INSERT_SUBREG)
7159 if (!ISR.hasOneUse())
7162 if (ISR.getConstantOperandVal(2) != PPC::sub_32)
7165 SDValue IDef = ISR.getOperand(0);
7173 SDValue Op32 = ISR->getOperand(1);
7189 if (!ToPromote.count(UN) && UN != ISR.getNode()) {
7245 SDValue ReplOpOps[] = { ISR.getOperand(0), V, ISR
[all...] |
| /openbsd-current/sys/dev/ic/ |
| H A D | ar5210.c | 1397 AR5K_PRINT_REGISTER(ISR);
|