Searched refs:INVALIDATE_ALL_L1_TLBS (Results 1 - 25 of 27) sorted by relevance

12

/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dgfxhub_v3_0_3.c235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgfxhub_v2_0.c228 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgfxhub_v1_0.c191 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgfxhub_v3_0.c230 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v2_0.c299 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v2_3.c223 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v3_0.c256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v3_0_1.c249 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v3_0_2.c248 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgfxhub_v2_1.c231 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v1_8.c243 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS,
H A Dmmhub_v1_0.c177 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgfxhub_v1_2.c240 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v1_7.c195 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dgmc_v7_0.c636 tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dmmhub_v9_4.c227 INVALIDATE_ALL_L1_TLBS, 1);
H A Dgmc_v8_0.c852 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
H A Dsid.h380 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
/openbsd-current/sys/dev/pci/drm/radeon/
H A Drv770d.h648 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dnid.h118 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dcikd.h497 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dsid.h379 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Devergreend.h1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dr600d.h593 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
H A Dni.c1287 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);

Completed in 703 milliseconds

12