Searched refs:INT_MASK (Results 1 - 10 of 10) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 1349 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
1382 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
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| /openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0.c | 1278 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
1311 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
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| H A D | smu_v13_0_6_ppt.c | 1332 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
1344 val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
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| /openbsd-current/sys/dev/pci/drm/radeon/ |
| H A D | sid.h | 819 #define INT_MASK 0x6b40 macro
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| H A D | evergreend.h | 1284 #define INT_MASK 0x6b40 macro
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| H A D | evergreen.c | 4479 WREG32(INT_MASK + crtc_offsets[i], 0);
4579 rdev, INT_MASK + crtc_offsets[i],
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| H A D | si.c | 5964 WREG32(INT_MASK + crtc_offsets[i], 0);
6118 rdev, INT_MASK + crtc_offsets[i], VBLANK_INT_MASK,
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| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | sid.h | 822 #define INT_MASK 0x1AD0 macro
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| /openbsd-current/sys/dev/pci/drm/amd/include/ |
| H A D | navi10_enum.h | 2072 * INT_MASK enum
2075 typedef enum INT_MASK { enum
2078 } INT_MASK; typedef in typeref:enum:INT_MASK
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| H A D | soc21_enum.h | 2074 * INT_MASK enum
2077 typedef enum INT_MASK { enum
2080 } INT_MASK; typedef in typeref:enum:INT_MASK
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