/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | ni.c | 1652 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | 1658 RREG32(GRBM_SOFT_RESET); 1660 WREG32(GRBM_SOFT_RESET, 0); 1661 RREG32(GRBM_SOFT_RESET); 1907 tmp = RREG32(GRBM_SOFT_RESET); 1909 dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); 1910 WREG32(GRBM_SOFT_RESET, tmp); 1911 tmp = RREG32(GRBM_SOFT_RESET); 1916 WREG32(GRBM_SOFT_RESET, tmp); 1917 tmp = RREG32(GRBM_SOFT_RESET); [all...] |
H A D | evergreen.c | 3073 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | 3079 RREG32(GRBM_SOFT_RESET); 3081 WREG32(GRBM_SOFT_RESET, 0); 3082 RREG32(GRBM_SOFT_RESET); 3975 tmp = RREG32(GRBM_SOFT_RESET); 3977 dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); 3978 WREG32(GRBM_SOFT_RESET, tmp); 3979 tmp = RREG32(GRBM_SOFT_RESET); 3984 WREG32(GRBM_SOFT_RESET, tmp); 3985 tmp = RREG32(GRBM_SOFT_RESET); [all...] |
H A D | rv770.c | 1105 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); 1106 RREG32(GRBM_SOFT_RESET); 1108 WREG32(GRBM_SOFT_RESET, 0);
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H A D | r600.c | 2661 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); 2662 RREG32(GRBM_SOFT_RESET); 2664 WREG32(GRBM_SOFT_RESET, 0); 2724 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); 2725 RREG32(GRBM_SOFT_RESET); 2727 WREG32(GRBM_SOFT_RESET, 0);
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H A D | si.c | 3950 tmp = RREG32(GRBM_SOFT_RESET); 3952 dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); 3953 WREG32(GRBM_SOFT_RESET, tmp); 3954 tmp = RREG32(GRBM_SOFT_RESET); 3959 WREG32(GRBM_SOFT_RESET, tmp); 3960 tmp = RREG32(GRBM_SOFT_RESET); 5808 u32 tmp = RREG32(GRBM_SOFT_RESET); 5811 WREG32(GRBM_SOFT_RESET, tmp); 5814 WREG32(GRBM_SOFT_RESET, tmp);
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H A D | rv770d.h | 401 #define GRBM_SOFT_RESET 0x8020 macro
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H A D | nid.h | 280 #define GRBM_SOFT_RESET 0x8020 macro
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H A D | cikd.h | 1075 #define GRBM_SOFT_RESET 0x8020 macro
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H A D | sid.h | 982 #define GRBM_SOFT_RESET 0x8020 macro
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H A D | cik.c | 5009 tmp = RREG32(GRBM_SOFT_RESET); 5011 dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); 5012 WREG32(GRBM_SOFT_RESET, tmp); 5013 tmp = RREG32(GRBM_SOFT_RESET); 5018 WREG32(GRBM_SOFT_RESET, tmp); 5019 tmp = RREG32(GRBM_SOFT_RESET);
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H A D | evergreend.h | 828 #define GRBM_SOFT_RESET 0x8020 macro
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H A D | r600d.h | 295 #define GRBM_SOFT_RESET 0x8020 macro
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | gfx_v8_0.c | 4061 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 4064 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); 4944 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); 4946 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); 4955 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 4960 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4962 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4964 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 5004 if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) || 5005 REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_GF [all...] |
H A D | gfx_v11_0.c | 1788 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 1790 WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); 4498 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4500 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4502 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4504 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4506 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4511 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4513 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, 4515 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, [all...] |
H A D | gfx_v9_4_3.c | 1193 WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), GRBM_SOFT_RESET, 1196 WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), GRBM_SOFT_RESET, 2099 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); 2101 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); 2106 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); 2113 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 2126 dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
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H A D | gfx_v9_0.c | 2842 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 2844 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); 3871 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); 3873 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); 3878 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); 3885 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 3902 dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
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H A D | sdma_v5_2.c | 706 GRBM_SOFT_RESET, SOFT_RESET_SDMA0, 712 DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);
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H A D | gfx_v6_0.c | 2460 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 2462 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);
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H A D | gfx_v10_0.c | 5061 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); 5063 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); 7238 GRBM_SOFT_RESET, SOFT_RESET_CP, 7241 GRBM_SOFT_RESET, SOFT_RESET_GFX, 7247 GRBM_SOFT_RESET, SOFT_RESET_CP, 7263 GRBM_SOFT_RESET, 7270 GRBM_SOFT_RESET, 7289 dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp);
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H A D | sid.h | 980 #define GRBM_SOFT_RESET 0x2008 macro
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