Searched refs:GPU_GARLIC_FLUSH_REQ__CP5__SHIFT (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h742 #define GPU_GARLIC_FLUSH_REQ__CP5__SHIFT 0x5 macro
H A Dbif_5_0_sh_mask.h832 #define GPU_GARLIC_FLUSH_REQ__CP5__SHIFT 0x5 macro
H A Dbif_5_1_sh_mask.h800 #define GPU_GARLIC_FLUSH_REQ__CP5__SHIFT 0x5 macro
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