Searched refs:GEN10_CACHE_MODE_SS (Results 1 - 2 of 2) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/i915/gt/ |
| H A D | intel_workarounds.c | 654 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
2319 wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS,
2357 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
2804 wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS, DISABLE_ECC);
2923 wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS,
2981 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
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| H A D | intel_gt_regs.h | 1172 #define GEN10_CACHE_MODE_SS MCR_REG(0xe420) macro
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