Searched refs:GDS_PS0_CTXSW_CNT3__UPDN__SHIFT (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h17496 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT 0x0 macro
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H A Dgfx_8_1_sh_mask.h18084 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT 0x0 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_sh_mask.h15254 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT macro
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H A Dgc_9_1_sh_mask.h15392 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT macro
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H A Dgc_9_0_sh_mask.h14085 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT macro
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H A Dgc_9_4_2_sh_mask.h7596 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT 0x0 macro
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H A Dgc_9_4_3_sh_mask.h17557 #define GDS_PS0_CTXSW_CNT3__UPDN__SHIFT macro
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