Searched refs:DPG_PIPE_ARBITRATION_CONTROL3 (Results 1 - 5 of 5) sorted by relevance
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dce/ |
H A D | dce_mem_input.h | 79 SRI(DPG_PIPE_ARBITRATION_CONTROL3, DMIF_PG, id),\ 133 uint32_t DPG_PIPE_ARBITRATION_CONTROL3; member in struct:dce_mem_input_registers 250 SFB(blk, DPG_PIPE_ARBITRATION_CONTROL3, URGENCY_WATERMARK_MASK, mask_sh),\
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H A D | dce_mem_input.c | 184 REG_UPDATE(DPG_PIPE_ARBITRATION_CONTROL3,
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/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | si.c | 2430 arb_control3 = RREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset); 2434 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp); 2439 tmp = RREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset); 2442 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp); 2447 WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, arb_control3);
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H A D | sid.h | 797 #define DPG_PIPE_ARBITRATION_CONTROL3 0x6cc8 macro
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/openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
H A D | sid.h | 800 #define DPG_PIPE_ARBITRATION_CONTROL3 0x1B32 macro
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